Lab 9 Pictures
1) UVEPROM in ceramic DIP, top view, 10x
3) TO-220 transistor, face section, 10x
3) TO-220 transistor, face section, 25x
5) Ceramic wire-bond PGA, top view
5) Ceramic wire-bond PGA, bottom view
8) CSP wire-bond CLCC package, top view
8) CSP wire-bond CLCC package, bottom view